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Entry Level / Junior DSP Communications Algorithm Software Engineer
Santa Clara, CA

  Join a dynamic, motivated and passionate engineering team at a Silicon Valley startup developing sophisticated communication products. XONE is looking for an entry­ or junior­level engineer who will be responsible for designing and developing complex signal processing algorithms implemented on state­of­the­art FPGA devices such as the XILINX Zynq SoC, and low power embedded processors. Experience a unique professional growth opportunity working alongside company leadership, gaining exposure to running an engineering company, and making a direct impact on the success of the company. XONE Technology is committed to crafting high performance, elegant solutions. XONE offers a modern open collaborative work environment, flexible work schedules, and provides a generous benefits package. Stock equity is available to candidates with directly relevant experience and leadership experience. Make an impact in a growing engineering technology company located in the heart of the Silicon Valley.

• Development of digital signal processing algorithms for transmit, receive, and geolocation of wireless communication signals

• Implementation of advanced interference mitigation techniques such as beamforming for operation in challenging RF signal environments. Design and implementation of detection, demodulation, decoding, timing and carrier recovery / synchronization receive processing functions

• Implementation of direction­finding and time­of­arrival based geolocation algorithms

• Design and implementation of algorithms in Matlab and in C/C++ for real­time embedded processors, operating in conjunction with algorithm modules on an FPGA

• Work with system design team in the definition of requirements and architecture

• Collaborate with FPGA and embedded software engineering team in design, implementation and test of functional and performance capabilities of the overall products

• Disciplined design process, documentation of designs, structured coding practices, analysis of test results, configuration management

• Involvement in all phases of the engineering lifecycle: R&D, prototyping, design, implementation, integration and test, system delivery, and product support

• Excellent written and verbal communications

• Operate in a collaborative engineering environment

Key Qualifications

• 0­5 years relevant industry experience

• Minimum BSEE, MSEE desired in digital signal processing, digital communications, and wireless communications

• Prototyping and analysis in Matlab. Working abilities in Simulink and System Generator for DSP Simulink desirable

• Programming in high level languages such as C/C++, and scripting languages such as Python

• RTL logic design in VHDL, and proficiency with FPGA development tools (Xilinx Vivado/ISE, ModelSim, Chipscope) a plus

• US citizenship and eligibility to obtain a security clearance required



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