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Logic design in VHDL for Zynq SoC and Kintex FPGA devices
• FPGA modeling, simulation, detailed design, implementation,
and verification using Xilinx Vivado/ISE, ModelSim, Chipscope
• Employ FPGA design methodology to address timing closure, design
constraints, clocking, I/O, low power consumption
• Design within modern processing architectures employing AXI
on-chip I/O, high speed interconnect I/O, high-capacity/-speed
DDR3 DRAM memory, peripherals (GPIO, I2C, SPI, UART)
• Integration of Xilinx IP cores into design
• Work with system design team in the definition of requirements
and architecture, design constraints, I/O and clock planning,
and generation of test vectors and verification plans
• Collaborate with embedded software engineering team in design,
implementation and test of functional and performance
capabilities of the overall products
• Disciplined design process, documentation of designs, structured
coding practices, analysis of test results, configuration management
• Involvement in all phases of the engineering lifecycle: R&D,
prototyping, design, implementation, integration and test, system delivery,
and product support
• Excellent written and verbal communications, with the ability
to give presentations internally and with customers
• Ability to work independently, understanding of priorities,
proven ability to meet schedule milestones and program objectives
• Operate in a collaborative engineering environment
• Ability to lead junior level engineers a plus
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10+ years relevant industry experience
• Minimum BSEE, MSEE desired in digital design
• RTL logic design in VHDL
• Proficiency with FPGA development tools: Xilinx Vivado/ISE,
ModelSim, Chipscope
• Prototyping and analysis in Matlab, Simulink desirable
• Programming in high level languages such as C/C++, and scripting
languages such as Python a plus
• Knowledge and experience in digital signal processing, digital
communications, and wireless communications a plus
• US citizenship and eligibility
to obtain a security clearance required |